Contents

• Half Adder is a digital circuit that performs addition of two single bit binary numbers. The Boolean expression for Half Adder is given by: Half Adder Output = A XOR B. Where A and B are the input binary bits.
• The Half Adder circuit diagram is shown below. It has two inputs ‘a’ and ‘b’ and two outputs, sum (S) and carry (C). C is generated when both the inputs are 1. The truth table for the half adder is also shown below.
• As can be seen from the truth table, when A=B=0, Half Adder output is 0. When A=B=1, Half Adder output is 1. When A=0 and B=1 or A=1 and B=0, Half Adder output is 1. So we can say that Half Adder performs addition of two binary bits just like we perform addition of two decimal numbers.”

• Full Adder is a logic circuit that performs an addition operation on three input bits. The inputs are two operands and a carry bit, and the output is the sum of the three inputs.
• Full adders are used in processors, memories, and other digital circuits where addition is required. Full adders are typically implemented using logic gates, but they can also be implemented using other electronic components such as flip-flops.

Half Adder and Full Adder are two important terms associated with digital logic.

• Half adder is a combinational circuit that performs the addition of two binary digits. Unlike a full adder, it cannot handle carry-over addition.
• On the other hand, a full adder is a combinational circuit that takes three input bits and produces two output bits, namely sum and carry.